1. Field of the Invention
The invention relates to a level shifter, and more particularly, to a level shifter for shifting the voltage level of a logic signal from a low operating voltage to a high operating voltage.
2. Description of the Prior Art
In an integrated circuit, because of the concerns of power and integration, the operating voltage of the integrated circuit is usually smaller than the operating voltage of an external system. Take an integrated circuit using 1.2V as the operating voltages to be an example, 1.2V and 0V are used to represent logic value 1 and 0 respectively. But an external circuit usually uses higher voltage as the operating voltage than the integrated circuit. For example, the operating voltage of circuit elements on a motherboard is normally 5V or 3.3V, that is, 5V or 3.3V is used to represent logic value 1, while 0V is used to represent logic value 0. Accordingly, in an integrated circuit, a device must be set for shifting the level of a logic signal switching between 1.2V and 0V into a logic signal switching between 5V(or 3.3V) and 0V, which is termed “low-to-high level shifter” hereinafter.
In an integrated circuit, a component operating at 5V/3.3V is called high-voltage element; a component operating at 1.2V is called low-voltage element. Take metal-oxide-semiconductor transistors (MOS transistor) for example, being a high-voltage element or a low-voltage element is determined by the thickness of the oxide-layer of the MOS transistor. Generally speaking, a high-voltage MOS transistor has a thicker oxide-layer than a low-voltage MOS transistor. Consequently, the threshold voltage of the high-voltage MOS transistor is higher than the threshold voltage of the low-voltage MOS transistor. Normally a high-voltage MOS transistor has a nominal threshold voltage of 0.9V.
Please refer to FIG. 1, a circuit diagram of a conventional low-to-high level shifter is illustrated. The low-to-high level shifter 100 includes: a high-voltage NMOS transistor 120, a high-voltage NMOS transistor 140, a high-voltage PMOS transistor 160 and a high-voltage PMOS transistor 180. When the four transistors are turned on or off, a first output end 191 and a second output end 192 will be charged or discharged, and the goal of level shifting will be achieved as a result.
Assume that in FIG. 1, VDDH=3.3V, VSSH=0V, VDDL=1.2V, VSSL=0V. When the potential of a first input signal SL1 changes from VSSL to VDDL, at first the high-voltage NMOS transistor 120 will be turned on, while the high-voltage NMOS transistor 140 will be turned off, the potential of a first output signal SH1 on the first output end 191 will become VSSH. Next, because the potential of the first output signal SH1 equals VSSH, the high-voltage PMOS transistor 180 will be turned on, in turn the potential of the second output signal SH2 on the second output end 192 will become VDDH.
But with advanced technology on integrated circuit processes, the operating voltage of the integrated circuit becomes smaller and smaller. For example, an integrated circuit produced through advanced technology can have an operating voltage lower than 1.2, such as 0.9V or even lower. Under such circumstances the low-to-high level shifter 100 in FIG. 1 will probably pass logic signals wrongly.
Now consider the situation when VDDL equals 1V (assume that other parameters are unchanged). When the potential of the first input signal SL1 changes from VSSL to VDDL, because VDDL is only a bit higher than the threshold voltage of the high-voltage NMOS transistor 120, the falling speed of the potential of the first output signal SH1 will be slow, in turn the raising speed of the potential of the second output signal SH2 will also be slow. The consequence is that the switching time for the integrated circuit becomes longer, the jitter problem of logic signals becomes more serious, and as a result the whole circuit becomes unreliable. If the operating frequency of the first input signal SL1 rises, the potential of the first output signal SH1 may not have enough time to switch correctly. An extreme case is that when VDDL equals 0.9V or is lower than 0.9V, when the potential at the gate of the high-voltage NMOS transistor 120 or the high-voltage NMOS transistor 140 equals VDDL, the two transistors may not be turned on, and the low-to-high level shifter can not function correctly at all.
As depicted above, one problem the prior art low-to-high level shifter faces is that logic signals probably can not pass through the low-to-high level shifter correctly, when the operating voltage of the integrated circuit becomes smaller and smaller